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José Miguel Mora-Gutiérrez
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2020 – today
- 2024
- [j6]Carlos Fernández-García
, José Miguel Mora-Gutierrez
TinyJAMBU Hardware Implementation for Low Power. IEEE Access 12: 108342-108349 (2024) - [c3]Pau Ortega-Castro, Felipe Rojas-Muñoz, José Miguel Mora-Gutiérrez, Piedad Brox, Macarena C. Martínez-Rodríguez:
VLSI integration of a RO-based PUF into a 65 nm technology. NorCAS 2024: 1-7 - 2021
- [j5]Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez
Trivium Stream Cipher Countermeasures Against Fault Injection Attacks and DFA. IEEE Access 9: 168444-168454 (2021) - [j4]Francisco Eugenio Potestad-Ordóñez
Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations. Sensors 21(22): 7596 (2021) - 2020
- [j3]José Miguel Mora-Gutierrez
ASIC Design and Power Characterization of Standard and Low Power Multi-Radix Trivium. IEEE Trans. Circuits Syst. 67-II(11): 2682-2686 (2020)
2010 – 2019
- 2017
- [j2]José Miguel Mora-Gutierrez
Trivium hardware implementations for power reduction. Int. J. Circuit Theory Appl. 45(2): 188-198 (2017) - [j1]José Miguel Mora-Gutierrez
Multiradix Trivium Implementations for Low-Power IoT Hardware. IEEE Trans. Very Large Scale Integr. Syst. 25(12): 3401-3405 (2017) - 2013
- [c2]Samuel Sordo Ibáñez, Blanca Piñero-García, Servando Espejo-Meana, Antonio Ragel-Morales, Joaquin Ceballos Caceres, Manuel Munoz-Diaz, Luis Carranza-González, Alberto Arias-Drake, José Miguel Mora-Gutierrez, Miguel Ángel Lagos-Florido
An adaptive approach to on-chip CMOS ramp generation for high resolution single-slope ADCs. ECCTD 2013: 1-4 - 2012
- [c1]José Miguel Mora-Gutierrez
Low Power Implementation of Trivium Stream Cipher. PATMOS 2012: 113-120
Coauthor Index
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