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Vanderson H. Fragal
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2010 – 2019
- 2019
- [j2]Vanderson Hafemann Fragal, Adenilso Simão
, Mohammad Reza Mousavi, Uraz Cengiz Türker:
Extending HSI Test Generation Method for Software Product Lines. Comput. J. 62(1): 109-129 (2019) - [j1]Vanderson Hafemann Fragal, Adenilso da Silva Simão
Hierarchical featured state machines. Sci. Comput. Program. 171: 67-88 (2019) - 2018
- [b1]Vanderson H. Fragal:
Automatic generation of configurable test-suites for software product lines. Halmstad University, Sweden, 2018 - 2017
- [c4]Vanderson Hafemann Fragal, Adenilso Simão
Reducing the Concretization Effort in FSM-Based Testing of Software Product Lines. ICST Workshops 2017: 329-336 - 2016
- [c3]Vanderson H. Fragal, Adenilso Simão
Validated Test Models for Software Product Lines: Featured Finite State Machines. FACS 2016: 210-227 - 2013
- [c2]Vanderson H. Fragal, Rogério F. da Silva, Itana Maria de Souza Gimenes, Edson A. Oliveira Junior:
Application Engineering for Embedded Systems - Transforming SysML Specification to Simulink within a Product-Line based Approach. ICEIS (2) 2013: 94-101 - [c1]Rogério F. da Silva, Vanderson H. Fragal, Edson A. Oliveira Junior, Itana Maria de Souza Gimenes, Flávio Oquendo:
SyMPLES - A SysML-based Approach for Developing Embedded Systems Software Product Lines. ICEIS (2) 2013: 257-264
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