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Tomoaki Kawamura
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2010 – 2019
- 2018
- [c5]Koji Yamazaki, Yuta Ukon, Shuhei Yoshida, Saki Hatta, Yusuke Sekihara, Shoko Ohteru, Tomoaki Kawamura, Takahiro Hatano, Koyo Nitta
, Akihiko Miyazaki:
Flow Cache Cleansing with FPGA Hash Pipe for Highly Stabilized Software Data Plane. HPSR 2018: 1-6 - 2014
- [c4]Takayoshi Tashiro, Shigeru Kuwano, Jun Terada, Tomoaki Kawamura, Nobuyuki Tanaka, Satoshi Shigematsu, Naoto Yoshimoto:
A novel DBA scheme for TDM-PON based mobile fronthaul. OFC 2014: 1-3 - 2011
- [c3]Shoko Ohteru, Tomoaki Kawamura, Hiroki Suto, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata:
A 22-Gb/s and over-33-mega-frame/s throughput bridge-function unit in a low-latency OLT LSI for the coexistence of 10G-EPON and GE-PON. A-SSCC 2011: 305-308
2000 – 2009
- 2008
- [j1]Yusuke Ohtomo, Masafumi Nogawa, Kazuyoshi Nishimura, Shunji Kimura
A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs. IEICE Trans. Electron. 91-C(6): 903-910 (2008) - [c2]Tomoaki Kawamura, Yusuke Ohtomo, Kazuyoshi Nishimura, Noboru Ishihara:
A 1ps-Resolution 2ns-Span 10Gb/s Data-Timing Generator with Spectrum Conversion. ISSCC 2008: 456-457 - 2006
- [c1]Masafumi Nogawa, Yusuke Ohtomo, Shunji Kimura, Kazuyoshi Nishimura, Tomoaki Kawamura, Minoru Togashi:
A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13µm CMOS. ISSCC 2006: 940-949
Coauthor Index
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last updated on 2024-10-07 21:17 CEST by the dblp team
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