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Yoshinori Muramatsu
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2010 – 2019
- 2018
- [j3]Atsushi Nose, Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Masatsugu Kobayashi, Sayaka Shida, Masaki Odahara, Kenichi Takamiya, Shizunori Matsumoto, Leo Miyashita, Yoshihiro Watanabe, Takashi Izawa, Yoshinori Muramatsu, Yoshikazu Nitta, Masatoshi Ishikawa
:
Design and Performance of a 1 ms High-Speed Vision Chip with 3D-Stacked 140 GOPS Column-Parallel PEs. Sensors 18(5): 1313 (2018) - 2017
- [c3]Tomohiro Yamazaki, Hironobu Katayama, Shuji Uehara, Atsushi Nose, Masatsugu Kobayashi, Sayaka Shida, Masaki Odahara, Kenichi Takamiya, Yasuaki Hisamatsu, Shizunori Matsumoto, Leo Miyashita, Yoshihiro Watanabe, Takashi Izawa, Yoshinori Muramatsu, Masatoshi Ishikawa
4.9 A 1ms high-speed vision chip with 3D-stacked 140GOPS column-parallel PEs for spatio-temporal image processing. ISSCC 2017: 82-83 - 2011
- [c2]Takayuki Toyama, Koji Mishina, Koji Tsuchiya, Tatsuya Ichikawa, Hiroyuki Iwaki, Yuji Gendai
A 17.7Mpixel 120fps CMOS image sensor with 34.8Gb/s readout. ISSCC 2011: 420-422
2000 – 2009
- 2006
- [c1]Yoshikazu Nitta, Yoshinori Muramatsu, Kiyotaka Amano, Takayuki Toyama, Jun Yamamoto, Koji Mishina, Atsushi Suzuki, Tadayuki Taura, Akihiko Kato, Masaru Kikuchi, Yukihiro Yasui, Hideo Nomura, Noriyuki Fukushima:
High-Speed Digital Double Sampling with Analog CDS on Column Parallel ADC Architecture for Low-Noise Active Pixel Sensor. ISSCC 2006: 2024-2031 - 2003
- [j2]Yoshinori Muramatsu, Susumu Kurosawa, Masayuki Furumiya, Hiroaki Ohkubo, Yasutaka Nakashiba:
A signal-processing CMOS image sensor using a simple analog operation. IEEE J. Solid State Circuits 38(1): 101-106 (2003)
1990 – 1999
- 1999
- [j1]Satoshi Utsugi, Masami Hanyu, Yoshinori Muramatsu, Tadahiko Sugibayashi:
Noncomplimentary rewriting and serial-data coding scheme for shared-sense-amplifier open-bit-line DRAM. IEEE J. Solid State Circuits 34(10): 1391-1394 (1999)
Coauthor Index
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