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Chien-Chang Lin
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2020 – today
- 2024
- [j6]Chien-Chang Lin
, Eddie S. J. Cheng, Anna Y. Q. Huang
DNA of learning behaviors: A novel approach of learning performance prediction by NLP. Comput. Educ. Artif. Intell. 6: 100227 (2024) - 2023
- [j5]Chien-Chang Lin
Artificial intelligence in intelligent tutoring systems toward sustainable education: a systematic review. Smart Learn. Environ. 10(1): 41 (2023)
2000 – 2009
- 2007
- [j4]Chien-Chang Lin, Jia-Wei Chen, Hsiu-Cheng Chang, Yao-Chang Yang, Yi-Huan Ou-Yang
A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications. IEEE J. Solid State Circuits 42(1): 170-182 (2007) - [j3]Trieu-Kien Truong, Chien-Chang Lin, Shi-Huang Chen:
Segmentation of specific speech signals from multi-dialog environment using SVM and wavelet. Pattern Recognit. Lett. 28(11): 1307-1313 (2007) - [c13]Tsung-Ching Lin, Chien-Wen Chen, Chien-Chang Lin, Trieu-Kien Truong:
Very Low Bit Rate Video Coding Using H.264 Codec and Cubic Spline Interpolation. IIH-MSP 2007: 11-14 - [c12]Hsiu-Cheng Chang, Jia-Wei Chen, Ching-Lung Su, Yao-Chang Yang, Yao Li, Chun-Hao Chang, Ze-Min Chen, Wei-Sen Yang, Chien-Chang Lin, Ching-Wen Chen, Jinn-Shyan Wang, Jiun-In Guo:
A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip. ISSCC 2007: 280-603 - [c11]Chih-Da Chien, Chien-Chang Lin, Yi-Hung Shih, He-Chun Chen, Chia-Jui Huang, Cheng-Yen Yu, Chih-Liang Chen, Ching-Hwa Cheng, Jiun-In Guo:
A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications. ISSCC 2007: 282-603 - 2006
- [c10]Jia-Wei Chen, Chien-Chang Lin, Jiun-In Guo, Jinn-Shyan Wang:
Low Complexity Architecture Design of H.264 Predictive Pixel Compensator for HDTV Application. ICASSP (3) 2006: 932-935 - [c9]Yao-Chang Yang, Chien-Chang Lin, Hsui-Cheng Chang, Ching-Lung Su, Jiun-In Guo:
A High Throughput VLSI Architecture Design for H.264 Context-Based Adaptive Binary Arithmetic Decoding with Look Ahead Parsing. ICME 2006: 357-360 - [c8]Jia-Wei Chen, Chun-Hao Chang, Chien-Chang Lin, Yi-Huan Yang
A Condition-based Intra Prediction Algorithm for H.264/AVC. ICME 2006: 1077-1080 - [c7]Tsung-Ching Lin, Trieu-Kien Truong, Shi-Huang Chen, Chien-Chang Lin, Pei-Ding Chen:
DCT-Based Image Codec Embedded Cubic Spline Interpolation with Optimal Quantization. ISM 2006: 11-15 - [c6]Chien-Chang Lin, Shi-Huang Chen, Tsung-Ching Lin, Trieu-Kien Truong:
Feature Comparison among Various Wavelets in Speaker Recognition Using Support Vector Machine. ISM 2006: 811-816 - 2005
- [j2]Chien-Chang Lin, Shi-Huang Chen, Trieu-Kien Truong, Yukon Chang:
Audio Classification and Categorization Based on Wavelets and Support Vector Machine. IEEE Trans. Speech Audio Process. 13(5-1): 644-651 (2005) - [c5]Hsiu-Cheng Chang, Chien-Chang Lin, Jiun-In Guo:
A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding. ISCAS (6) 2005: 6110-6113 - 2004
- [c4]Tai-Lun Chang, Ying-Ming Tsai, Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo:
A high-performance MPEG4 bitstream processing core. ICME 2004: 467-470 - [c3]Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo, Tien-Fu Chen:
A power-aware IP core generator for the one-dimensional discrete Fourier transform. ISCAS (3) 2004: 637-640 - 2003
- [c2]Jiun-In Guo, Chih-Da Chien, Chien-Chang Lin:
A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipelining. ISCAS (5) 2003: 293-296 - 2002
- [j1]Jiun-In Guo, Chien-Chang Lin, Chih-Da Chien:
A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths. J. Circuits Syst. Comput. 11(4): 405-428 (2002) - [c1]Jiun-In Guo, Chien-Chang Lin:
A new hardware efficient design for the one dimensional discrete Fourier transform. ISCAS (5) 2002: 549-552
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