default search action
Journal of Systems Architecture, Volume 61
Volume 61, Number 1, January 2015
- Soumya J., Srijan Tiwary, Santanu Chattopadhyay:
Area-performance trade-off in floorplan generation of Application-Specific Network-on-Chip with soft cores. 1-11 - Sanghyuk Jung, Yong Ho Song:
Data loss recovery for power failure in flash memory storage systems. 12-27 - Nikolaos Zompakis, Alexandros Bartzas, Dimitrios Soudris:
Using Chaos Theory based workload analysis to perform Dynamic Frequency Scaling on MPSoCs. 28-39 - A. Aguilar, Raimundo García-Olcina, I. Leiva, P. A. Martínez, Julio Martos, Jesús Soret, Adrián Suárez, José Torres, José María Benlloch, A. J. González:
Optimization of a Time-to-Digital Converter and a coincidence map algorithm for TOF-PET applications. 40-48 - Yahia Benmoussa, Jalil Boukhobza, Eric Senn, Yassine Hadjadj Aoul, Djamel Benazzouz:
A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous SoC and its applications. 49-70
Volume 61, Number 2, February 2015
- Zheng Li, Shangping Ren, Gang Quan:
Energy minimization for reliability-guaranteed real-time applications using DVFS and checkpointing techniques. 71-81 - Michael Wahler, Thomas Gamer, Atul Kumar, Manuel Oriol:
FASA: A software architecture and runtime framework for flexible distributed automation systems. 82-111 - Yan Wang, Kenli Li, Keqin Li:
Minimizing write operation for multi-dimensional DSP applications via a two-level partition technique with complete memory latency hiding. 112-126 - Yifeng Guo, Hang Su, Dakai Zhu, Hakan Aydin:
Preference-oriented real-time scheduling and its application in fault-tolerant systems. 127-139
Volume 61, Numbers 3-4, March 2015
- Kai Hu, Teng Zhang, Zhibin Yang, Wei-Tek Tsai:
Exploring AADL verification tool through model transformation. 141-156 - Jalil Boukhobza, Pierre Olivier, Stéphane Rubini, Laurent Lemarchand, Yassine Hadjadj Aoul, Arezki Laga:
MaCACH: An adaptive cache-aware hybrid FTL mapping scheme using feedback control for efficient page-mapped space management. 157-171 - Xin An, Abdoulaye Gamatié, Éric Rutten:
High-level design space exploration for adaptive applications on multiprocessor systems-on-chip. 172-184 - Jesús Barba, María J. Santofimia, Julio Dondo, Fernando Rincón Calle, Julián Caba, Juan Carlos López:
FPGA acceleration of semantic tree reasoning algorithms. 185-196
Volume 61, Numbers 5-6, May-June 2015
- Davide Zoni, Federico Terraneo, William Fornaciari:
A control-based methodology for power-performance optimization in NoCs exploiting DVFS. 197-209 - Linwei Niu, Jia Xu:
Improving schedulability and energy efficiency for window-constrained real-time systems with reliability requirement. 210-226 - Ruben Gran, Juan Segarra, A. Pedro-Zapater, Luis C. Aparicio, Víctor Viñals, Clemente Rodríguez:
A predictable hardware to exploit temporal reuse in real-time and embedded systems. 227-238 - Pablo Basanta-Val, Marisol García-Valls:
A library for developing real-time and embedded applications in C. 239-255 - Gianluca Dini, Lanfranco Lopriore:
Distributed storage protection in wireless sensor networks. 256-266 - Marisol García-Valls, Tommaso Cucinotta:
Real-time and distributed computing in emerging applications. Foreword by the general chairs of Reaction 2012. 267-268
Volume 61, Number 7, August 2015
- Guy Martin Tchamgoue, Jun-Ho Seo, Kyong Hoon Kim, Yong-Kee Jun:
Compositional power-aware real-time scheduling with discrete frequency levels. 269-281 - Wei Jiang, Ke Jiang, Xia Zhang, Yue Ma:
Energy Optimization of Security-Critical Real-Time Applications with Guaranteed Security Protection. 282-292 - Tahir Maqsood, Sabeen Ali, Saif Ur Rehman Malik, Sajjad Ahmad Madani:
Dynamic task mapping for Network-on-Chip based systems. 293-306 - Chun-Chen Hsu, Ding-Yong Hong, Wei-Chung Hsu, Pangfeng Liu, Jan-Jan Wu:
A dynamic binary translation system in a client/server environment. 307-319
Volume 61, Number 8, September 2015
- Muhammad Ali Awan, Stefan M. Petters:
Intra-task device scheduling for real-time embedded systems. 321-340 - Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar:
Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics. 341-360 - Myungsik Kim, Seongjin Lee, Jinchul Shin, Youjip Won:
LASER: Latency-Aware Segment Relocation for non-volatile memory. 361-373 - Stefan Waldherr, Sigrid Knust, Stefan Aust:
Message scheduling for real-time interprocessor communication. 374-382
Volume 61, Number 9, October 2015
- Chun Jiang Zhu, Kam-yiu Lam, Yuan-Hao Chang, Joseph Kee-Yin Ng:
Linked Block-based Multiversion B-Tree index for PCM-based embedded databases. 383-397 - Unai Díaz-de-Cerio, Juan P. Uribe, Michael González Harbour, J. Carlos Palencia:
On the convergence of the holistic analysis for EDF distributed systems. 398-409 - Soumya J., Kundan Kumar, Santanu Chattopadhyay:
Integrated core selection and mapping for mesh based Network-on-Chip design with irregular core sizes. 410-422 - Shaoteng Liu, Axel Jantsch, Zhonghai Lu:
MultiCS: Circuit switched NoC with multiple sub-networks and sub-channels. 423-434
- Andrew Nelson, Kees Goossens, Benny Akesson:
Dataflow formalisation of real-time streaming applications on a Composable and Predictable Multi-Processor SOC. 435-448 - Martin Schoeberl, Sahar Abbaspour, Benny Akesson, Neil C. Audsley, Raffaele Capasso, Jamie Garside, Kees Goossens, Sven Goossens, Scott Hansen, Reinhold Heckmann, Stefan Hepp, Benedikt Huber, Alexander Jordan, Evangelia Kasapaki, Jens Knoop, Yonghui Li, Daniel Prokesch, Wolfgang Puffitsch, Peter P. Puschner, André Rocha, Cláudio Silva, Jens Sparsø, Alessandro Tocchi:
T-CREST: Time-predictable multi-core architecture for embedded systems. 449-471 - Stefan Resch, Andreas Steininger, Christoph Scherrer:
A composable real-time architecture for replicated railway applications. 472-485 - Maher Fakih, Kim Grüttner, Martin Fränzle, Achim Rettberg:
State-based real-time analysis of SDF applications on MPSoCs with shared communication resources. 486-509
Volume 61, Number 10, November 2015
- Nizar Msadek, Rolf Kiefhaber, Theo Ungerer:
A trustworthy, fault-tolerant and scalable self-configuration algorithm for Organic Computing systems. 511-519 - Johny Paul, Benjamin Oechslein, Christoph Erhardt, Jens Schedel, Manfred Kröhnert, Daniel Lohmann, Walter Stechele, Tamim Asfour, Wolfgang Schröder-Preikschat:
Self-adaptive corner detection on MPSoC through resource-aware programming. 520-530 - Matthias Meier, Mark Breddemann, Olaf Spinczyk:
Interfacing the hardware API with a feature-based operating system family. 531-538 - Krishna M. Kavi, Stefano Pianelli, Giandomenico Pisano, Giuseppe Regina, Mike Ignatowski:
Memory organizations for 3D-DRAMs and PCMs in processor memory hierarchy. 539-552 - Antonio Barros, Luís Miguel Pinho, Patrick Meumeu Yomsi:
Non-preemptive and SRP-based fully-preemptive scheduling of real-time Software Transactional Memory. 553-566 - Xiaojun Zhai, Kofi Appiah, Shoaib Ehsan, Gareth Howells, Huosheng Hu, Dongbing Gu, Klaus D. McDonald-Maier:
Exploring ICMetrics to detect abnormal program behaviour on embedded devices. 567-575 - S. Ali Mirsoleimani, Farshad Khunjush, Ali Karami:
A two-tier design space exploration algorithm to construct GPU performance model. 576-583 - Alexandru C. Iordan, Magnus Jahre, Lasse Natvig:
Tuning the victim selection policy of Intel TBB. 584-591 - Andre Oliver Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf:
Denial-of-Service attacks on PCI passthrough devices: Demonstrating the impact on network- and storage-I/O performance. 592-599
- Frank Hannig, Andreas Herkersdorf:
Introduction to the Special Issue on Testing, prototyping, and debugging of multi-core architectures. 600 - Amrish K. Tewar, Albert R. Myers, Aleksandar Milenkovic:
mcfTRaptor: Toward unobtrusive on-the-fly control-flow tracing in multicores. 601-614 - Vahid Lari, Jürgen Teich, Alexandru Tanase, Michael Witterauf, Faramarz Khosravi, Brett H. Meyer:
Techniques for on-demand structural redundancy for massively parallel processor arrays. 615-627 - Mario Kicherer, Wolfgang Karl:
Automatic task mapping and heterogeneity-aware fault tolerance: The benefits for runtime optimization and application development. 628-638
- João Paulo Fernandes Barbosa, Antonyus Pyetro do Amaral Ferreira, Rodrigo Camarotti Ferreira da Rocha, Erika S. Albuquerque, Josivan R. Reis, Djeefther S. Albuquerque, Edna Natividade da Silva Barros:
A high performance hardware accelerator for dynamic texture segmentation. 639-645 - Oliver Reiche, Konrad Häublein, Marc Reichenbach, Moritz Schmid, Frank Hannig, Jürgen Teich, Dietmar Fey:
Synthesis and optimization of image processing accelerators using domain knowledge. 646-658 - Julián Ramos Cózar, Manuel J. Marín-Jiménez, José María González-Linares, Nicolás Guil, Juan Gómez-Luna:
Calculation of dense trajectory descriptors on a heterogeneous embedded architecture. 659-667 - Johny Paul, Walter Stechele, Benjamin Oechslein, Christoph Erhardt, Jens Schedel, Daniel Lohmann, Wolfgang Schröder-Preikschat, Manfred Kröhnert, Tamim Asfour, Éricles Sousa, Vahid Lari, Frank Hannig, Jürgen Teich, Artjom Grudnitsky, Lars Bauer, Jörg Henkel:
Resource-awareness on heterogeneous MPSoCs for image processing. 668-680 - Artur Zawadzki, Marek Gorgon:
Automatically controlled pan-tilt smart camera with FPGA based image analysis system dedicated to real-time tracking of a moving object. 681-692 - Luca Bochi Saldanha, Christophe Bobda:
An embedded system for handwritten digit recognition. 693-699
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.