default search action
14th SBCCI 2001: Pirenopolis, Brazil
- Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2001, Pirenopolis, Brazil, September 10-15, 2001. IEEE Computer Society 2001, ISBN 0-7695-1333-6
- Jürgen Becker, Thilo Pionteck, Manfred Glesner:
Adaptive Systems-on-Chip: Architectures, Technologies and Applications. 2-7 - João M. Fernandes, Ricardo J. Machado:
System-Level Object-Orientation in the Specification and Validation of Embedded Systems. 8-13 - Márcio Eduardo Kreutz, Luigi Carro, Cesar A. Zeferino, Altamiro Amadeu Susin:
Communication Architectures for System-on-Chip. 14-19 - José Luis Gómez-Cipriano, Roger Pizzatto Nunes, Sergio Bampi, Dante Barone:
Design of Functional Blocks for a Speech Recognition Portable System. 20-27 - Marcel Jacomet, Josef Goette, Jörg Breitenstein, Markus Hager:
On a Development Environment for Real-Time Information Processing in System-on-Chip Solutions. 28-31 - Mauro Cesar Zanella, Michael Robrecht, André Luiz de Freitas Francisco, A. Horst, Thomas Lehmann, R. Gielow:
RABBIT - A Modular Rapid Prototyping Platform for Distributed Mechatronic Systems. 32-37 - Fernando Moraes, Alexandre M. Amory, Ney Calazans, Eduardo Bezerra, Juracy Petrini:
Using the CAN Protocol and Reconfigurable Computing Technology for Web-Based Smart House Auto. 38-43 - Bruno Santos Pimentel, João Hilário de Ávila Valgas Filho, Rodrigo Lacerda Campos, Antônio Otávio Fernandes, Claudionor José Nunes Coelho Jr.:
A FPGA Implementation of a DCT-Based Digital Electrocardiographic Signal Compression Device. 44-51 - L. P. Nascimento:
An Automated Tool for Analysis and Design of MVL Digital Circuits. 52-57 - Heinz-Dieter Hümmer, Walter Geisselhardt:
New Aspects in High-Level Specification, Verification, and Design of IT Protocols. 58-63 - David Déharbe, Jorgiano Márcio Bruno Vidal:
Optimizing BDD-Based Verification Analysing Variable Dependencies. 64-71 - Fred Cruz Filho, Paulo Maciel, Edna Barros:
A Petri Net Based Approach for Hardware/Software Partitioning. 72-77 - Paulo Maciel, Fred Cruz Filho, Edna Barros:
A Petri Net Based Method for Resource Estimation: An Approach Considering Data-Dependency, Casual and Temporal Precedences. 78-84 - Francisco Assis M. do Nascimento, Wolfgang Rosenstiel:
A Repartitioning and HW/SW Partitioning Algorithm to the Automatic Design Space Exploration in the Co-Synthesis of Embedded Systems. 85-90 - Ana Luiza de Almeida Pereira Zuquim, Claudionor José Nunes Coelho Jr., Antônio Otávio Fernandes, Marcos Pêgo de Oliveira, Andréa Iabrudi Tavares:
An Embedded Converter from RS232 to Universal Serial Bus. 91-97 - João Baptista dos Santos Martins, Fernando Moraes, Ricardo Reis:
Interconnection Length Estimation at Logic-Level. 98-102 - André C. Nácul, Luigi Carro, Daniel Janner, Marcelo Lubaszewski:
A BIST Procedure for Analog Mixers in Software Radio. 103-108 - Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.:
Summarizing a New Approach to Design Speech Recognition Systems: A Reliable Noise-Immune HW-SW Version. 109-114 - Laurence Tianruo Yang, Jon C. Muzio:
An Integrated High-Level Test Synthesis for Built-in Self-Testable Designs. 115-123 - Carlos Renato T. de Mori, Paulo César Crepaldi, Tales Cleber Pimenta:
A 3-V 12-Bit Second Order Sigma-Delta Modulator Design in 0.8µm CMOS. 124-129 - Marcelo Antonio Pavanello, João Antonio Martino, Denis Flandre:
Analog Circuit Design Using Graded-Channel SOI NMOSFETS. 130-135 - Rafael M. Coitinho, Luís H. Spiller, Márcio C. Schneider, Carlos Galup-Montoro:
A Simplified Methodology for the Extraction of the ACM MOST Model Parameters. 136-141 - A. C. R. Silva, A. S. Cardoso:
An Environment to Aid the Synthesis of ThreePhase Analogue Waveform Using AHDL. 142-149 - Achim Rettberg, Bernd Kleinjohann:
A Fast Asynchronous Re-Configurable Architecture for Multimedia Applications. 150-155 - Ricardo Pezzuol Jacobi, Luis Gustavo A. Carvalho, João Coelho:
Data Encription in an Electronic Ballot Box. 156-160 - Alexandro M. S. Adário, Sergio Bampi:
Extending Sequencing Graphs for Reconfigurable Applications Modeling. 161-167 - Evandro de Araújo Jardini, Dilvan de Abreu Moreira:
Designing VLSI Circuit Masks with the Software Agents2. 168-173 - Luciano Copello Ost, Marcos Mainardi, Leandro Soares Indrusiak, Ricardo Reis:
Jale3D - Platform-independent IC/MEMS Layout Edition Tool. 174-179 - Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis:
LEGAL: An Algorithm for Simultaneous Net Routing. 180-185 - Rui Martins, Heinrich Kirchauer:
Testing the Printability of VLSI Layouts. 186-193 - Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen:
On Designing Mixed-Signal Fuzzy Logic Controllers as Embedded Subsystems in Standard CMOS Technologies. 194-200 - Eduardo Costa, Sergio Bampi, José Monteiro:
Power Efficient Arithmetic Operand Encoding. 201-206 - Volney C. Vincence, Carlos Galup-Montoro, Márcio C. Schneider:
Low-Voltage Class AB Operational Amplifier. 207-211 - João Portela, José Monteiro:
Power Optimized Viterbi Decoder Implementation through Architectural Transforms. 212-219 - Duarte Lopes de Oliveira, Wagner Chiepa Cunha, Marius Strum, Wang Jiang Chau:
Synthesis of Multi-Burst Controllers as Modified Huffman Machines. 220-225 - Luciano Volcan Agostini, Sergio Bampi, Ivan Saraiva Silva:
Pipelined Fast 2-D DCT Architecture for JPEG Image Compression. 226-231 - Ricardo Pezzuol Jacobi, José Porfírio A. de Carvalho:
IDCT Design for JPEG Decompression in an Electronic Ballot Box. 232-236
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-12-15 01:15 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: