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37th ICCD 2019: Abu Dhabi, UAE
- 37th IEEE International Conference on Computer Design, ICCD 2019, Abu Dhabi, United Arab Emirates, November 17-20, 2019. IEEE 2019, ISBN 978-1-5386-6648-7
Session 1A: Optimized Design Methodology
- Ilias Giechaskiel
, Kasper Rasmussen, Jakub Szefer:
Reading Between the Dies: Cross-SLR Covert Channels on Multi-Tenant Cloud FPGAs. 1-10 - Qicheng Huang, Chenlei Fang, Zeye Liu, Ruizhou Ding, R. D. Shawn Blanton:
IPSA: Integer Programming via Sparse Approximation for Efficient Test-Chip Design. 11-19 - Prashanth Krishnamurthy, Hossein Salehghaffari, Shiva Duraisamy, Ramesh Karri
Stealthy Rootkits in Smart Grid Controllers. 20-28 - Chiou-Yng Lee, Jiafeng Xie:
Efficient Scalable Three Operand Multiplier Over GF(2^m) Based on Novel Decomposition Strategy. 29-37
Session 1B: Accelerators and Machine Learning I
- Guy Maor, Xiaoming Zeng, Zhendong Wang, Yang Hu:
An FPGA Implementation of Stochastic Computing-Based LSTM. 38-46 - Maodi Ma, Jingweijia Tan, Xiaohui Wei, Kaige Yan:
Process Variation Mitigation on Convolutional Neural Network Accelerator Architecture. 47-55 - Yunfan Li, Drew Penney, Abhishek Ramamurthy, Lizhong Chen:
Characterizing On-Chip Traffic Patterns in General-Purpose GPUs: A Deep Learning Approach. 56-64 - Jinrong Guo, Wantao Liu, Wang Wang, Chunrong Yao, Jizhong Han, Ruixuan Li, Yijun Lu, Songlin Hu
AccUDNN: A GPU Memory Efficient Accelerator for Training Ultra-Deep Neural Networks. 65-72
Session 2A: Architectural Advances for IoT Applications
- Hsuan-Kung Yang, Tsu-Jui Fu, Po-Han Chiang, Kuan-Wei Ho, Chun-Yi Lee
A Distributed Scheme for Accelerating Semantic Video Segmentation on An Embedded Cluster. 73-81 - HeeJong Park, Arvind Easwaran
TiLA: Twin-in-the-Loop Architecture for Cyber-Physical Production Systems. 82-90 - Wen Li, Ying Wang, Huawei Li, Xiaowei Li
RRAMedy: Protecting ReRAM-Based Neural Network from Permanent and Soft Faults During Its Lifetime. 91-99 - Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
WiXI: An Inter-Chip Wireless Bus Interface for Shape-Changeable Chiplet-Based Computers. 100-108
Session 2B: Architecture & Compilers II
- Mainak Chaudhuri, Jayesh Gaur, Sreenivas Subramoney
Bandwidth-Aware Last-Level Caching: Efficiently Coordinating Off-Chip Read and Write Bandwidth. 109-118 - Vinson Young, Moinuddin K. Qureshi:
To Update or Not To Update?: Bandwidth-Efficient Intelligent Replacement Policies for DRAM Caches. 119-128 - Georgios Zacharopoulos, Lorenzo Ferretti, Giovanni Ansaloni, Giuseppe Di Guglielmo, Luca P. Carloni, Laura Pozzi:
Compiler-Assisted Selection of Hardware Acceleration Candidates from Application Source Code. 129-137 - En Shao, Guangming Tan, Zhan Wang, Guojun Yuan, Ninghui Sun:
A New Traffic Offloading Method with Slow Switching Optical Device in Exascale Computer. 138-146
Session 3A: Advances in the Design and Implementation of Neural Networks
- Bing Wu
ReRAM Crossbar-Based Analog Computing Architecture for Naive Bayesian Engine. 147-155 - Sayed Abdolrasouol Faraji, Gaurav Singh, Kia Bazargan:
HBUNN - Hybrid Binary-Unary Neural Network: Realizing a Complete CNN on an FPGA. 156-163 - Shenggang Chen, Zhonghai Lu:
Hardware Acceleration of Multilayer Perceptron Based on Inter-Layer Optimization. 164-172 - Gaoming Du, Zhenwen Yang, Zhenmin Li, Duoli Zhang, Yongsheng Yin, Zhonghai Lu:
NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator. 173-176 - Xiaojia Song, Tao Xie, Stephen Fischer:
A Memory-Access-Efficient Adaptive Implementation of kNN on FPGA through HLS. 177-180
Session 3B: Storage Systems
- Ming-Chang Lee, Li-Pin Chang, Sung-Ming Wu
Adaptive Write Interference Management with Efficient Mapping for Shingled Recording Disks. 181-189 - Chunxue Zuo, Fang Wang, Ping Huang, Yuchong Hu, Dan Feng:
RepEC-Duet: Ensure High Reliability and Performance for Deduplicated and Delta-Compressed Storage Systems. 190-198 - Tianming Jiang, Jiangfeng Zeng, Ke Zhou, Ping Huang, Tianming Yang:
Lifelong Disk Failure Prediction via GAN-Based Anomaly Detection. 199-207 - Yubo Liu, Hongbo Li, Yutong Lu, Zhiguang Chen, Ming Zhao:
An Efficient and Flexible Metadata Management Layer for Local File Systems. 208-216
Session 4A: Innovation on Safety and Security for Robust Real-Time Systems
- Hengyi Liang, Zhilu Wang, Debayan Roy, Soumyajit Dey, Samarjit Chakraborty
Security-Driven Codesign with Weakly-Hard Constraints for Real-Time Embedded Systems. 217-226 - Sergi Vilardell
Software Timing Analysis for Complex Hardware with Survivability and Risk Analysis. 227-236 - Xiaochen Hao, Mingsong Lv
Integrating Cyber-Attack Defense Techniques into Real-Time Cyber-Physical Systems. 237-245 - Moming Duan, Duo Liu, Xianzhang Chen
Astraea: Self-Balancing Federated Learning for Improving Classification Accuracy of Mobile Deep Learning Applications. 246-254
Session 4B: Processor and Memory Architectures
- Timon Evenblij, Christian Tenllado, Manu Perumkunnil, Francky Catthoor, Sushil Sakhare, Peter Debacker, Gouri Sankar Kar, Arnaud Furnémont, Nicolas Bueno, José Ignacio Gómez Pérez
A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs. 255-263 - Nezam Rohbani, Tapas Kumar Maiti
NVDL-Cache: Narrow-Width Value Aware Variable Delay Low-Power Data Cache. 264-272 - Pooria M. Yaghini, George Michelogiannakis
SpecLock: Speculative Lock Forwarding. 273-282 - Jonathan Beaumont
Fine-Grained Management of Thread Blocks for Irregular Applications. 283-292
Session 5a: IoT Covert Channel Attacks in Air-Gapped Networks
- Ryan Vrecenar, Michael Hall, Joshua Zshiesche, Mahesh Naidu, Jeyavijayan Rajendran, Stavros Kalafatis:
Red Teaming a Multi-Colored Bluetooth Bulb. 293-296 - Eleonore Carpentier, Corentin Thomasset, Jérémy Briffaut:
Bridging The Gap: Data Exfiltration In Highly Secured Environments Using Bluetooth IoTs. 297-300 - Patrick Cronin, Charles Gouert, Dimitris Mouris
Covert Data Exfiltration Using Light and Power Channels. 301-304
Session 5B: Miscellaneous topics in Test, Verification, and Security
- Debiprasanna Sahoo
Post-Model Validation of Victim DRAM Caches. 305-308 - Mohammad-Mahdi Bidmeshki, Kiruba Sankaran Subramani, Yiorgos Makris
Revisiting Capacitor-Based Trojan Design. 309-312 - Shivani Tripathy, Debiprasanna Sahoo
Formal Modeling and Verification of NAND Flash Memory Supporting Advanced Operations. 313-316
Session 6a: Hardware and Software Implementations for Efficient PostQuantum Cryptography
- Sujoy Sinha Roy:
SaberX4: High-Throughput Software Implementation of Saber Key Encapsulation Mechanism. 321-324 - Emanuele Bellini
Advances and Challenges of Rank Metric Cryptography Implementations. 325-328 - Hamid Nejatollahi, Rosario Cammarota, Nikil D. Dutt
Flexible NTT Accelerators for RLWE Lattice-Based Cryptography. 329-332 - Huili Chen, Rosario Cammarota, Felipe Valencia
PlaidML-HE: Acceleration of Deep Learning Kernels to Compute on Encrypted Data. 333-336 - Deepraj Soni, Mohammed Nabeel, Kanad Basu, Ramesh Karri
Power, Area, Speed, and Security (PASS) Trade-Offs of NIST PQC Signature Candidates Using a C to ASIC Design Flow. 337-340
Session 6B: Architecture & Compilers I
- Vinson Young, Zeshan A. Chishti, Moinuddin K. Qureshi:
TicToc: Enabling Bandwidth-Efficient DRAM Caching for Both Hits and Misses in Hybrid Memory Systems. 341-349 - Youngbin Kim
Static Function Prefetching for Efficient Code Management on Scratchpad Memory. 350-358 - Jianqi Chen, Benjamin Carrión Schäfer:
Low Power Design through Frequency-Optimized Runtime Micro-Architectural Adaptation. 359-366 - Zhuohui Duan
HiNUMA: NUMA-Aware Data Placement and Migration in Hybrid Memory Systems. 367-375
Session 7A: Advances in Power, Thermal and Timing Aware Optimization
- Behnam Khaleghi, Sahand Salamat, Mohsen Imani, Tajana Rosing:
FPGA Energy Efficiency by Leveraging Thermal Margin. 376-384 - Mohammed Salman Ahmed
A Memetic Algorithm Based PVT Variation-Aware Robust Transistor Sizing Scheme for Power-Delay Optimal Digital Standard Cell Design. 385-392 - Mohammad Saeed Abrishami, Massoud Pedram, Shahin Nazarian:
CSM-NN: Current Source Model Based Logic Circuit Simulation - A Neural Network Approach. 393-400 - Jianqi Chen, Benjamin Carrión Schäfer:
Exploiting the Benefits of High-Level Synthesis for Thermal-Aware VLSI Design. 401-404 - Charalampos Antoniadis
Efficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits. 405-408 - Jan Moritz Joseph
System-Level Optimization of Network-on-Chips for Heterogeneous 3D System-on-Chips. 409-412
Session 7B: EDA for Non-Logic Issues and Non-CMOS Technologies
- Inga Abel, Maximilian Neuner, Helmut Graeb:
Constraint-Programmed Initial Sizing of Analog Operational Amplifiers. 413-421 - Ling-Yen Song, Yi-Ling Chen, Yung-Chun Lei, Juinn-Dar Huang
Forecast-Based Sample Preparation Algorithm for Unbalanced Splitting Correction on DMFBs. 422-428 - Ruizhe Cai, Olivia Chen
A Buffer and Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits. 429-436 - Cheng Tan
PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks. 437-445 - Shahin Nazarian, Arash Fayyazi, Massoud Pedram:
qCG: A Low-Power Multi-Domain SFQ Logic Design and Verification Framework. 446-449
Session 8a: Robust Hardware Design with Machine Learning
- Yongjian Li, Jialun Cao, Jun Pang:
A Learning-Based Framework for Automatic Parameterized Verification. 450-459 - Farah Naz Taher, Anjana Balachandran, Benjamin Carrión Schäfer:
Learning-Based Diversity Estimation: Leveraging the Power of High-Level Synthesis to Mitigate Common-Mode Failure. 460-467 - Avishek Choudhury, Biplab K. Sikdar:
Soft Error Resilience in Chip Multiprocessor Cache using a Markov Model Based Re-usability Predictor. 468-476
Session 8B: Accelerators and Machine Learning II
- Wen Wen
ReNEW: Enhancing Lifetime for ReRAM Crossbar Based Neural Network Accelerators. 487-496 - Weihao Cui, Mengze Wei, Quan Chen, Xiaoxin Tang, Jingwen Leng, Li Li, Mingyi Guo:
Ebird: Elastic Batch for Improving Responsiveness and Throughput of Deep Learning Services. 497-505 - Ning Lin, Hang Lu, Xing Hu, Jingliang Gao, Mingzhe Zhang, Xiaowei Li
When Deep Learning Meets the Edge: Auto-Masking Deep Neural Networks for Efficient Machine Learning on Edge Devices. 506-514 - Young Seo Lee, Kyung Min Kim, Ji Heon Lee, Jeong Hwan Choi, Sung Woo Chung:
A High-Performance Processing-in-Memory Accelerator for Inline Data Deduplication. 515-523
Session 9A: Innovative Circuits for Improved Power Consumption andPerformance Characteristics
- Siyuan Xu, Benjamin Carrión Schäfer:
Low Power Design of Runtime Reconfigurable FPGAs through Contexts Approximations. 524-531 - Divya Pathak, Ioannis Savidis:
Applying Swarm Intelligence to Distributed On-Chip Power Management. 532-540 - Xiaoyu Zhang, Xiaoming Chen, Yinhe Han:
FeMAT: Exploring In-Memory Processing in Multifunctional FeFET-Based Memory Array. 541-549 - Ankit Wagle, Gian Singh, Jinghua Yang, Sunil P. Khatri, Sarma B. K. Vrudhula:
Threshold Logic in a Flash. 550-558
Session 9B: Hardware Security
- Maxime Montoya
Adaptive Masking: a Dynamic Trade-off between Energy Consumption and Hardware Security. 559-566 - Saranyu Chattopadhyay
Cyclic Beneš Network Based Logic Encryption for Mitigating SAT-Based Attacks. 567-575 - Mahmood Azhar Qureshi, Arslan Munir
PUF-RLA: A PUF-Based Reliable and Lightweight Authentication Protocol Employing Binary String Shuffling. 576-584 - Jingquan Ge, Neng Gao, Chenyang Tu, Ji Xiang, Zeyi Liu:
AdapTimer: Hardware/Software Collaborative Timer Resistant to Flush-Based Cache Attacks on ARM-FPGA Embedded SoC. 585-593
Session 10A: Miscellaneous Topics in Computer Systems I
- Yang Hu, Jianda Wang:
Architectural and Cost Implications of the 5G Edge NFV Systems. 594-603 - Yuezhi Che, Yuan Hong, Rujia Wang:
Imbalance-Aware Scheduler for Fast and Secure Ring ORAM Data Retrieval. 604-612 - Wenhui Zhang, Qiang Cao, Hong Jiang, Jie Yao, Yuanyuan Dong, Puyuan Yang:
SPA-SSD: Exploit Heterogeneity and Parallelism of 3D SLC-TLC Hybrid SSD to Improve Write Performance. 613-621 - Jinghan Zhang, Hamed Tabkhi, Gunar Schirner
Mitigating Application Diversity for Allocating a Unified ACC-Rich Platform. 622-625 - Ning Lin, Hang Lu, Jingliang Gao, Shunjie Qiao, Xiaowei Li
VNet: A Versatile Network for Efficient Real-Time Semantic Segmentation. 626-629
Session 10B: Machine Learning Techniques for Innovative Energy-EfficientSolutions
- Ruben Vazquez
Energy Prediction for Cache Tuning in Embedded Systems. 630-637 - Shaswot Shresthamali
Power Management of Wireless Sensor Nodes with Coordinated Distributed Reinforcement Learning. 638-647 - Kazim Ergun, Raid Ayoub, Pietro Mercati
Dynamic Optimization of Battery Health in IoT Networks. 648-655 - Matina Maria Trompouki
BRASIL: A High-Integrity GPGPU Toolchain for Automotive Systems. 660-663
Session 11A: Miscellaneous Topics in Computer Systems II
- Mingzhe Zhang, Lunkai Zhang, Frederic T. Chong
Balancing Performance and Energy Efficiency of ONoC by Using Adaptive Bandwidth. 664-667 - Lanlan Cui, Fei Wu, Xiaojian Liu, Meng Zhang, Changsheng Xie:
VaLLR: Threshold Voltage Distribution Aware LLR Optimization to Improve LDPC Decoding Performance for 3D TLC NAND Flash. 668-671 - Yicheng Wang
Reinforce Memory Error Protection by Breaking DRAM Disturbance Correlation Within ECC Words. 672-675 - Jinting Ren, Xianzhang Chen
Archivist: A Machine Learning Assisted Data Placement Mechanism for Hybrid Storage Systems. 676-679 - Yi Zhang, Zhanwei Ling, Ran Cui, Mingsong Lv
Detecting and Predicting Performance Degradation Caused by Impaired Cache Isolation. 680-683
Session 11B: Processor and Memory Architectures
- WonJun Song, John Kim
A Case for Software-Based Adaptive Routing in NUMA Systems. 684-693 - Kleovoulos Kalaitzidis, André Seznec:
Value Speculation through Equality Prediction. 694-697 - Donghyun Kang, Jintaek Kang, Hyungdal Kwon, Hyunsik Park, Soonhoi Ha:
A Novel Convolutional Neural Network Accelerator That Enables Fully-Pipelined Execution of Layers. 698-701 - Raj Kumar Choudhary, Newton Singh
Freeflow Core: Enhancing Performance of In-Order Cores with Energy Efficiency. 702-705
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