default search action
14th HEART 2024: Porto, Portugal
- Lana Josipovic, Peipei Zhou, Shreejith Shanker, João M. P. Cardoso, Jason Anderson, Shibata Yuichiro:
Proceedings of the 14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, HEART 2024, Porto, Portugal, June 19-21, 2024. ACM 2024 - Juan Miguel De Haro Ruiz
, Carlos Ávarez Martínez
Enabling high-level parallel programming on multi-FPGA clusters. 1-9 - Maksim Levental
BraggHLS: High-Level Synthesis for Low-Latency Deep Neural Networks for Experimental Science. 10-17 - Gento Hiruma
High-Level Synthesis Countermeasure Using Threshold Implementation with Mixed Number of Shares. 18-26 - Ce Guo
Resource-Constraint Bayesian Optimization for Soft Processors on FPGAs. 27-36 - Julian Haase
Embedded Security Accelerators within Network-on-Chip Environments. 37-43 - Martin Langhammer
Soft GPGPU versus IP cores: Quantifying and Reducing the Performance Gap. 44-52 - Federico Corradi
Accelerated Spiking Convolutional Neural Networks for Scalable Population Genomics. 53-62 - Kaijie Wei
A data compressor for FPGA-based state vector quantum simulators. 63-70 - Geetesh More
Learned Index Acceleration with FPGAs: A SMART Approach. 71-80 - Rikuya Tomii
A Hardware Solver for Simultaneous Linear Equations with Multistage Interconnection Network. 81-89 - Raveena Raikar
LiquidMD: Optimizing Inter-die and Intra-die placement for 2.5D FPGA Architectures. 90-98 - Kate Thurmer
VIPER: A VTR Interface for Placement with Error Resilience. 99-108 - Haoran Wei
CAD Techniques for NoC-Connected Multi-CGRA Systems. 109-118 - Yuxi Tan
Systolic Array-Based Many-Core Processor with Simultaneous Dual-Instruction Issuance. 119-125 - Ajay Kumar M
Implementation and analysis of custom instructions on RISC-V for Edge-AI applications. 126-129 - Ai Nozaki
MLIR-Based Homomorphic Encryption Compiler for GPU. 130-132 - Elias Barbudo
Latency-Accurate Models for Software Programmable Streaming Coarse-Grained Reconfigurable Hardware Architectures. 133-134 - Maksim Levental
An End-to-End Programming Model for AI Engine Architectures. 135-136
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-12-15 01:14 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: