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Modern Circuit Placement 2007
- Gi-Joon Nam, Jason Cong:
Modern Circuit Placement, Best Practices and Results. Springer 2007, ISBN 978-0-387-36837-5 - Gi-Joon Nam, Charles J. Alpert, Paul G. Villarrubia:
ISPD 2005/2006 Placement Benchmarks. 3-12 - Jason Cong, Michalis Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie:
Locality and Utilization in Placement Suboptimality. 13-36 - Tao Luo, David Z. Pan:
DPlace: Anchor Cell-Based Quadratic Placement with Linear Objective. 39-58 - Peter Spindler, Frank M. Johannes:
Kraftwerk: A Fast and Robust Quadratic Placer Using an Exact Linear Net Model. 59-93 - Jarrod A. Roy, David A. Papa, Igor L. Markov:
Capo: Congestion-Driven Placement for Standard-cell and RTL Netlists with Incremental Capability. 97-133 - Taraneh Taghavi, Xiaojian Yang, Bo-Kyung Choi, Maogang Wang, Majid Sarrafzadeh:
Congestion Minimization in Modern Placement Circuits. 135-163 - Andrew B. Kahng, Sherief Reda, Qinke Wang:
APlace: A High Quality, Large-Scale Analytical Placer. 167-192 - Natarajan Viswanathan, Min Pan, Chris Chu:
FastPlace: An Efficient Multilevel Force-Directed Placement Algorithm. 193-228 - Bo Hu, Malgorzata Marek-Sadowska:
mFAR: Multilevel Fixed-Points Addition-Based VLSI Placement. 229-245 - Tony F. Chan, Kenton Sze, Joseph R. Shinnerl, Min Xie:
mPL6: Enhanced Multilevel Mixed-Size Placement with Congestion Control. 247-288 - Tung-Chieh Chen, Zhe-Wei Jiang, Tien-Chang Hsu, Hsin-Chen Chen, Yao-Wen Chang:
NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs. 289-309 - Conclusion and Challenges. 311-312
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