Cycle-Accurate Virtual Prototyping with Multiplicity - Equipe System on Chip
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Communication Dans Un Congrès Année : 2024
Cycle-Accurate Virtual Prototyping with Multiplicity
1 ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce (France)
"> ALSOC - Architecture et Logiciels pour Systèmes Embarqués sur Puce
2 LabSoC - System on Chip (Télécom Paris (Eurecom) Sophia Antipolis - France)
"> LabSoC - System on Chip
3 COMELEC - Département Communications & Electronique (19 Place Marguerite Perey 91120 PALAISEAU - France)
"> COMELEC - Département Communications & Electronique

Résumé

Model-based design for large applications, especially the mapping of applications' tasks to execution nodes, remains a challenge. In this paper, we explore applications comprising multiple identical software tasks intended for deployment across diverse execution nodes. While these tasks are expected to have a unified representation in their SysML-like block diagrams, each must be specifically mapped to individual processor cores to achieve granular performance optimization. Additionally, inter-task communications should be allocated across multiple channels. We further demonstrate a method for automatically generating parallel POSIX C code suitable for a multiprocessor-on-chip. Our approach has proven especially effective for high-performance streaming applications, notably when such applications have a master-worker task structure.
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Dates et versions

hal-04483274 , version 1 (29-02-2024)
Identifiants

Citer

Daniela Genius, Ludovic Apvrille. Cycle-Accurate Virtual Prototyping with Multiplicity. MODELSWARD 2024 : 12th International Conference on Model-Based Software and Systems Engineering, INSTICC, Feb 2024, Rome, Italy. pp.187-194, ⟨10.5220/0012386100003645⟩. ⟨hal-04483274⟩
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